1. Field of the Invention
The present invention relates to an ultrasonic operation apparatus and, in more particular, to an ultrasonic operation apparatus uniquely detecting and controlling resonance frequencies.
2. Description of the Related Art
Conventionally, various kinds of ultrasonic apparatus using ultrasonic vibrators as ultrasonic converters have been proposed, and, for example, a surgical ultrasonic knife and/or an ultrasonic processing apparatus have been known.
An ultrasonic vibrator used in a surgical ultrasonic knife or an ultrasonic processing apparatus has higher conversion efficiency. Therefore, it has been conventionally known that the ultrasonic vibrator is driven at the mechanical resonance point of the ultrasonic vibrator.
The most common unit to be resonated at the mechanical resonance point is a resonance point tracking circuit according to the so-called phase-locked loop (PLL) method. The resonance point tracking circuit detects the phases of voltage to be applied to an ultrasonic vibrator and of the fed current and controls such that the phase difference can be zero.
This is excellent method for tracking the changes in load to be applied to the ultrasonic vibrator since the ultrasonic vibrator can be driven securely at the resonance point.
However, in order to perform resonance-point tracking by using the PLL, an initial resonance frequency (Fro) in accordance with a probe connected to the vibrator must be securely detected, as shown in FIG. 10, before the tracking operation.
An initial resonance frequency (Fro) may depend on the type of probe connected to the vibrator, variation in material and workmanship and/or ambient temperature.
Like the one disclosed in Japanese Unexamined Patent Application Publication No. 2002-45368, in order to detect an initial resonance frequency (Fro), output frequencies are swept. When the initial resonance frequency (Fro) is detected by detecting the current and changes in phase during the sweeping, a PLL method automatic tracking operation at the resonance point, which changes in operation, is performed.
FIG. 11 describes the conventional technology and includes an ultrasonic vibrator 114, an ultrasonic operation apparatus 110, and a foot switch 101. The ultrasonic vibrator 114 has an ultrasonic vibrator 114a and a probe 114b. The ultrasonic vibrator 114 has an initial resonance frequency (Fro). The foot switch 101 controls ultrasonic outputs of the ultrasonic operation apparatus 100.
The ultrasonic operation apparatus 100 includes a CPU 102, a hand-piece (HP) discriminating circuit 110, a PLL control circuit 116, a sweep circuit 103, a resonance frequency detecting circuit 113, a multiplier 105, a power amplifier 109, and a detecting circuit 112. The CPU 102 performs the main control of the ultrasonic operation apparatus 100. The HP discriminating circuit 110 discriminates the type of the connected ultrasonic vibrator. The PLL control circuit 116 performs PLL operations. The sweep circuit 103 sweeps frequencies of ultrasonic outputs when the initial resonance frequency (Fro) is detected. The resonance frequency detecting circuit 113 detects the change from + to − in phase differences between the voltage of the ultrasonic output and current phase signals. The multiplier 105 multiplies a set signal DA1 for setting the magnitude of an ultrasonic output to SIN waveforms to be output from a DDS 107 for generating SIN waveforms. The power amplifier 109 amplifies ultrasonic outputs. The detecting circuit 112 detects the voltage and current signals of ultrasonic outputs.
When an operator turns ON the foot switch 101, 8-bits of initial setting frequency signals (Fo) are sent from the CPU 102 to the sweep circuit 103. Then, a sweep start signal (/SWEEP_ON) is sent, and the sweeping of the output frequencies for detecting the initial resonance frequency (Fro) is started. Here, the initial setting frequency signal (Fo) is a frequency for starting the frequency sweep.
According to the output setting for the detection of the initial resonance frequency (Fro), 4-bits of output current signals are output from the CPU 102 to a D/A converter 104. The output current signals are D/A-converted in the D/A converter 104 and are output to the multiplier 105.
The sweep circuit 103 down-counts the initial setting frequency signals (Fo) at constant time intervals and generates sweep signals (Fo′). When the initial resonance frequency (Fro) is detected, the initial setting frequency signals (Fo) pass through an UP/DOWN counter 106 and become drive frequency setting signals (Fs). Then, the drive frequency setting signals (Fs) are input to the DDS 107.
The UP/DOWN counter 106 functions during the PLL tracking operation and is used for tracking frequencies. Therefore, the UP/DOWN counter 106 is designed so as to operate only when the input PLL_ON signal is ON. The input PLL_ON signal is turned on when the initial resonance frequency (Fro) is detected.
The DDS 107 outputs SIN waveforms in accordance with the drive frequency setting signal (Fs), and the SIN waveform output from the DDS 107 is input to the multiplier 105. Then, the output current signal from the CPU 102 is multiplied by the signal DA1, which has been D/A-converted in the D/A converter 104.
The SIN waveforms output from the multiplier 105 are amplified in the power amplifier 109 and are output to the ultrasonic vibrator 114a through the detecting circuit 112. Then, the probe 114b connected to the ultrasonic vibrator 114a is ultrasonically vibrated.
In the detecting circuit 112, the phase signals θv (voltage phase signal) and θi (current phase signal) of the ultrasonic outputs (voltage and current) are detected and are output to a phase comparator 108 and the resonance frequency detecting circuit 113. Furthermore, the effective value |I| of the output current is detected and is output to the CPU 102 through an A/D converter 111.
The CPU 102 monitors the effective value |I| of the output current from the frequency sweeping when the initial resonance frequency (Fro) is detected. If the effective value |I| exceeds a predetermined threshold value |I|ref, the enable signal /PHA_EN is turned on for the resonance frequency detecting circuit 113. Then, the operation of the resonance frequency detecting circuit 113 is started.
The resonance frequency detecting circuit 113 detects the phase difference between the voltage phase signal θv and the current phase signal θi and detects the frequency where the phase difference changes from + to − (that is, where the phase difference is zero) as the initial resonance frequency (Fro). Then, the PLL_ON is turned on. If the initial resonance frequency (Fro) cannot be detected during one sweep of output frequencies, the detection of the initial resonance frequency (Fro) is performed again (twice maximum).
The sweep circuit 103 in which the PLL_ON is turned on stops the frequency sweeping and keeps the frequency changes below the detected resonance frequency.
Because the PLL_ON is turned on, the UP/DOWN counter 106 and the phase comparator 108 start operating, and the PLL 116 performs the tracking of resonance frequency.
The phase comparator 108 detects the phase difference between the voltage phase signal θv and the current phase signal θi. Then, for the frequency tracking, the phase comparator 108 outputs a control signal (called UP/DOWN signal, hereinafter) for raising or lowering the output frequency of the output (SIN waveform) from the DDS 107. Then, the UP/DOWN signal is input to the UP/DOWN counter 106.
The UP/DOWN counter 106 outputs a drive frequency setting signal (Fs) based on the initial resonance frequency (Fro) detected when the resonance frequency is detected and the UP/DOWN signal from the phase comparator 108. The drive frequency setting signal (Fs) is a frequency setting signal to be actually output from the DDS 107.
Next, the processing flow will be described up to the PLL pull-in in a conventional ultrasonic coagulation/resection apparatus having the above-described construction.
As shown in FIG. 12, when an operator turns on the foot switch 101 at a step S101, the CPU 102 outputs 4-bits of output current signals to the D/A converter 104 in order to set the output when the initial resonance frequency (Fro) is detected at a step S102. Then, the D/A converter 104 D/A converts and outputs the 4-bits of output current signals to the multiplier 105.
At a step S103, the CPU 102 sends 8-bits of initial setting frequency signals (Fo) to the sweep circuit 103. Then, a sweep start signal (/SWEEP_ON) is sent, and the sweeping of the output frequencies for detecting the initial resonance frequency (Fro) is started.
At a step S104, the number of sweeps is counted, and it is determined at a step S105 whether the effective value |I| of the output current exceeds the threshold value |I|ref or not. If the effective value |I| of the output current exceeds the threshold value |I| ref, it is determined at a step S 106 whether the phase difference between the voltage phase signal θv and the current phase signal θi changes from + to −. If the change from + to − is detected, the change is detected as the initial resonance frequency (Fro). At a step S107, the frequency sweeping is stopped, and the operations of the UP/DOWN counter 106 and the phase comparator 108 are started. Thus, the tracking of resonance frequencies by the PLL 116 is performed.
If it is determined at the step S105 that the effective value |I| of the output current does not exceed the threshold value |I|ref, it is determined at a step S108 whether the number of sweeps is two or not. If the first sweeping has been performed, the processing returns to the step S103. Then, the subsequent steps are performed. If the second sweeping has been performed, an alarm is given and the output is stopped at a step S109.